Special Session Paper Submission Deadline: November 10, 2016

Two proposals for special sessions have been accepted:

Special Session 1: Embedded Systems & IoT

Special Session 2: Reconfigurable Logic Design and Verification




Special Session 1: Embedded Systems & IoT



Since the use of embedded systems is becoming more and more widespread (IoT, Smart cities, Transport, Smart Manufacturing Systems, etc.), the design and verification of these software dominated systems become a complex task. To tackle this complexity, there is an urgent need to review co-design flow and related performance evaluation and optimisation techniques.
On the other hand, due to the heterogeneity of their components and their interdependencies, it is quasi impossible to guarantee they are failure-free permanently. Hence, developing advanced monitoring facilities and alternative solutions becomes essential.
The aim of this session is to expose recent works on issues related to design, monitoring and verification of embedded systems used in IoT and smart cities, developing and using models for performance, security and safety purposes.

Track Topics:

  • Co-Design

  • IoT

  • Performance

  • Verification & validation

  • Formal methods

  • Monitoring/diagnosis

  • Transportation systems

  • Security

  • Specification

  • Reconfiguration

  • Embedded OS

  • Embedded Systems

  • Smart Sensors

Qualifications of the organizers

Pr Abderrazak JEMAI received an Engineer degree from the University of Tunis (ENSI), Tunisia in 1988 and the DEA and “Doctor” degrees from the University of Grenoble (ENSIMAG-INPG), France, in 1989 and 1992, respectively, and he received his Habilitation Degree in 2012, all in computer science. Since 1993, his interests are focused on high level synthesis and simulation at behavioral and system levels within AMICAL and COSMOS at TIMA Laboratory in Grenoble.

He is also the principal investigator for the “Performance evaluation of MPSoC: Time & Energy consumption” project in LIP2/FST Laboratory in Tunis. Since 2013, he became an associate professor in ICT at INSAT University. From 2014 to August 2015, Abderrazak JEMAI became the General Director of the National Center of Informatics in Tunisia (CNI). 


Abderrazak JEMAI
INSAT, University of Carthage, Tunisia.
INSAT, B.P. 676, 1080 Tunis Cedex

Pr Mohamed GHAZEL is a senior researcher with COSYS/ESTAS research team (Evaluation and Safety of Automated Transport Systems) at the IFSTTAR institute (The French Institute of Science and Technology for Transport, Development and Networks). He is member of the IFAC technical committee TC 7.4 on Transportation systems. He obtained in 2001 the engineering diploma in Productics from the ENSAIT de Roubaix (France), the Masters degree in automatic control and industrial computer sciences from Ecole Centrale de Lille/University of Lille (France) in 2002, and the the Ph.D in automatic control and industrial computer sciences from the same university in 2002.

In 2014, he received the Habilitation à Diriger des Recherches (HDR) from the University of Lille.

Dr. Ghazel specializes in safety and security of transportation systems and develops methods of behavioral modeling, state estimation, verification & validation, fault detection and diagnosis, while using formal discrete event notations (Petri Nets, State Finite Automata, Temporal Logic, etc.) and semi-formal (UML, etc.) models. The main applications of his research are in transportation and critical systems, with a special interest in guided transportation systems (improvement of safety and interoperability in railways, ERTMS, etc.). He has been involved in several national and European research projects dealing with safety and security of guided transportation systems and critical infrastructures.

Dr. Ghazel teaches software engineering with various applications to critical systems to engineering and Master’s students. He has supervised several PhD and Master’s theses and is a reviewer for international journals and conferences.


Mohamed GHAZEL
20 rue Elisée Reclus
59650 Villeneuve d’Ascq, France

Paper Submission

Papers submitted to this special session should be done through the IDT 2016 EasyChair submission system. The paper types are identical to those of regular submissions.


 Special Session 2: Reconfigurable Logic Design and Verification

Organizer: Prof. Ashraf Salem


The session will cover the new trends in Reconfigurable Logic Design and Verification, including the new techniques of partitioning big deigns on single or multiple FPGAs, the use of the reconfigurable logic to implement complex designs, the use of FPGAs as accelerators, NoC and Security-aware design implementation on FPGA and secure Furthermore, the session will cover design verification using Emulators and FPGA-based prototyping. Finally, it will address the use of the virtual prototyping approach combined with emulation and FPGA verification methodologies

Qualifications of the organizer

Ashraf Salem is Engineering Director in Mentor Graphics Egypt. He manages a group of 170 engineers working in the development of Emulation, Simulation and Embedded Systems products. Dr. Salem obtained his Ph.D. from Grenoble University, France in 1992. He got his B.Sc. and M.Sc. in Computer Engineering from Ain Shams University in 1983, 1987 respectively. He was the CEO of the Technology Innovation and Entrepreneurship Center (TIEC) and professor of Computer Engineering, Faculty of Engineering, Ain Shams University.

Dr. Salem participated in the establishment of ANACAD branch in Egypt in 1995 that then has been acquired by Mentor Graphics and became one of the largest multinational development centers. Dr. Salem is Member of the board of Nile Pharmaceuticals Company and he is on the Board of the trustees of Information Technology Institute and he participated in the establishment of Software Engineering Competence Center in Egypt

He published more than 100 scientific articles in the fields of Computer Aided design of Digital circuits. He chaired the technical committees in a number of international conferences, and he supervised more than 30 PhD and M. Sc. thesis in digital design and Embedded systems. Also, he participated in a number of international research projects and developed one of the pioneer research products for circuit verification in the eighties.

Paper Submission

The paper types are identical to those of regular submissions. Please submit your proposal to this special session by email to the organizer at:






Important Dates

- November 3, 2016

  Regular Paper Submission

- November
23, 2016
 Acceptance Notification

- December
4, 2016
  Final Submission and Registration

December 18-20:
    IDT 2016