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Special Session Paper Submission Deadline: November 10, 2016 Two proposals for special sessions have been accepted: Special Session 1: Embedded Systems & IoT Special Session 2: Reconfigurable Logic Design and Verification
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Special Session 1: Embedded Systems & IoT Organizers:
Description:
Since the use of embedded systems is becoming more
and more widespread (IoT, Smart cities, Transport,
Smart Manufacturing Systems, etc.), the design and
verification of these software dominated systems
become a complex task. To tackle this complexity,
there is an urgent need to review co-design flow and
related performance evaluation and optimisation
techniques.
Qualifications of the organizers
He is also the principal investigator for the “Performance evaluation of MPSoC: Time & Energy consumption” project in LIP2/FST Laboratory in Tunis. Since 2013, he became an associate professor in ICT at INSAT University. From 2014 to August 2015, Abderrazak JEMAI became the General Director of the National Center of Informatics in Tunisia (CNI). Contact:
Abderrazak JEMAI
In 2014, he received the Habilitation à Diriger des Recherches (HDR) from the University of Lille. Dr. Ghazel specializes in safety and security of transportation systems and develops methods of behavioral modeling, state estimation, verification & validation, fault detection and diagnosis, while using formal discrete event notations (Petri Nets, State Finite Automata, Temporal Logic, etc.) and semi-formal (UML, etc.) models. The main applications of his research are in transportation and critical systems, with a special interest in guided transportation systems (improvement of safety and interoperability in railways, ERTMS, etc.). He has been involved in several national and European research projects dealing with safety and security of guided transportation systems and critical infrastructures. Dr. Ghazel teaches software engineering with various applications to critical systems to engineering and Master’s students. He has supervised several PhD and Master’s theses and is a reviewer for international journals and conferences. Contact:
Mohamed GHAZEL Paper Submission Papers submitted to this special session should be done through the IDT 2016 EasyChair submission system. The paper types are identical to those of regular submissions.
Special Session 2: Reconfigurable Logic Design and Verification Organizer: Prof. Ashraf Salem Description: The session will cover the new trends in Reconfigurable Logic Design and Verification, including the new techniques of partitioning big deigns on single or multiple FPGAs, the use of the reconfigurable logic to implement complex designs, the use of FPGAs as accelerators, NoC and Security-aware design implementation on FPGA and secure Furthermore, the session will cover design verification using Emulators and FPGA-based prototyping. Finally, it will address the use of the virtual prototyping approach combined with emulation and FPGA verification methodologies Qualifications of the organizer
Dr. Salem participated in the establishment of
ANACAD branch in Egypt in 1995 that then has been
acquired by Mentor Graphics and became one of the
largest multinational development centers.
Dr. Salem is Member of the board of Nile
Pharmaceuticals Company and he is on the Board of
the trustees of Information Technology Institute and
he participated in the establishment of Software
Engineering Competence Center in Egypt Paper Submission The paper types are identical to those of regular submissions. Please submit your proposal to this special session by email to the organizer at: ashraf_salem@mentor.com
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Important Dates
Regular Paper
Submission
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