IDT2016

IDT 2016 Plenary and keynote speakers include:

 


Prof Ozcan Ozturk

Analysis of Design Parameters in Safety-Critical Systems

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Abstract

Recently, Safety-critical computers are extensively used in many civil domains like transportation including railways, avionics and automotive. We noticed that in design of some previous works, some critical safety design parameters like failure diagnostic coverage (DC) or common cause failure (CCF) ratio have not been seriously taken into account. Moreover, in some cases safety has not been compared with standard safety levels (IEC-61508: SIL1-SIL4) or even have not met them. Most often, it is not very clear that which part of the system is the Achilles' heel and how design can be improved to reach standard safety levels. Motivated by such design ambiguities, we aim to study the effect of various design parameters on safety in some prevalent safety configurations: 1oo2 and 2oo3. 1oo1 is also used as a reference. By employing Markov modeling, sensitivity of safety to each of the following critical design parameters is analyzed: failure rate of processing element, failure diagnostic coverage, common cause failures and repair rates. This study gives a deeper sense regarding the influence of variation in design parameters over safety. Consequently, to meet appropriate safety integrity level, instead of improving some system parts blindly, it will be possible to make an informed decision on more relevant parameters.

Biography

Ozcan Ozturk is an Associate Professor in the Department of Computer Engineering at Bilkent University. His research interests are in the areas of many core architectures, parallel computing, and computer architecture. Prior to joining Bilkent, he worked in Cellular and Handheld Group at Intel and Marvell. He also held positions in NEC Labs and Arizona State University. His research has been recognized by Fulbright, Turk Telekom, IBM, Intel, HiPEAC, Tubitak, and European Commission



Prof Smail Niar

Embedded Systems Design for Critical Applications

Abstract

While the search for high-performance will continue to be one of the main driving factors in computing system design, embedded systems have an increasing need in optimizing extra-functional properties (EFP) in terms of energy efficiency, predictability, reliability and adaptability. These EFP are vital for safety critical applications, including hard real-time systems. It was reported that EFP constraints are becoming the main barriers in the exploitation of technological advances. If these EFP are not taken into account in the design of safety-critical systems, failures may occur which may result in loss of life and damage. Transportation systems (automotive, railway or avionics), medical devices or nuclear systems are examples of critical systems where designer needs to explore different tradeoffs in terms of performance, reliability, complexity and energy consumption.
This special session is dedicated to the different topics related to the study of efficient support of critical applications in general and those taking aware of EFP in particular:
TOPICS OF INTEREST INCLUDE (BUT ARE NOT LIMITED TO)

  • Design Space Exploration tools for EFP in critical systems.

  • Simulation tools for critical systems.

  • Reliability and energy consumption for mixed-criticality systems.

  • Operating System support for EFP, mixed-critical systems and real time applications.

  • Dynamic resource management for mixed-criticality systems and dynamic reconfiguration for highly reliable systems.

  • Design-space exploration for multi-physical mixed-criticality systems

  • Industrial case-studies and best practice

 

Biography

Pr. Smail Niar (University of Valenciennes & CNRS, France) received his Ph.D. in computer Engineering fromthe University of Lille in 1990. Since then, he has been professor at the University of Valenciennes. He is leader of the ‘‘Mobile & Embedded Systems’’ research group at the ‘‘Laboratory For Automation, Mechanical and Computer Engineering’’, a joint research unit between CNRS and the university of Valenciennes.



Prof Julius Georgiou

Microelectronic Systems for Improved Quality of Life

Abstract

Microelectronic revolutions come in waves that are driven by necessity. Currently, the aging population is creating a need for various kinds of electronic systems to improve their quality of life. These include the restoration of lost functionality via electronic implants, better health screening technology and non-invasive monitoring in the home environment. In this talk I will present work that has been done towards addressing these needs, whether it be through the development of new required building blocks or through the development of more complex systems that combine custom built hardware and software. In particular the talk covers work done towards developing a vestibular implant for balance restoration, a single chip low-power imager for a bionic eye, a cancer screening capsule for detecting early-stage carcinomas in the small intestine and a bio-inspired acoustic scene analysis system.

Biography

Julius Georgiou (IEEE M’98-SM’08) is an Associate Professor at the University of Cyprus. He received his M.Eng degree in Electrical and Electronic Engineering and Ph.D. degree from Imperial College London in 1998 and 2003 respectively. For two years he worked as Head of Micropower Design in a technology start-up company, Toumaz Technology. In 2004 he joined the Johns Hopkins University as a Postdoctoral Fellow, before becoming a faculty member at the University of Cyprus from 2005 to date.

Prof. Georgiou is a member of the IEEE Circuits and Systems Society, is the Chair of the IEEE Biomedical and Life Science Circuits and Systems (BioCAS) Technical Committee, as well as a member of the IEEE Circuits and Systems Society Analog Signal Processing Technical Committee. He served as the General Chair of the 2010 IEEE Biomedical Circuits and Systems Conference and is the Action Chair of the EU COST Action ICT-1401 on “Memristors-Devices, Models, Circuits, Systems and Applications - MemoCIS”. Prof. Georgiou has been selected as an IEEE Circuits and Systems Society Distinguished Lecturer for 2016-2017. He is also is an Associate Editor of the IEEE Transactions on Biomedical Circuits and Systems and Associate Editor of the Frontiers in Neuromorphic Engineering Journal. He is a recipient of a best paper award at the IEEE ISCAS 2011 International Symposium and at the IEEE BioDevices 2008 Conference. In 2016 he received the 2015 ONE Award from the President of the Republic of Cyprus for his research accomplishments.
His research interests include Low-power analog and digital ASICs, implantable biomedical devices, bioinspired electronic systems, electronics for space, brain-computer-interfaces (BCIs), memristive devices, inertial and optical sensors and related systems.

 


Prof Reda NOUACER

Virtual platforms: from consumer electronics to critical embedded systems

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Biography

Reda NOUACER is a research engineer at CEA, LIST, Software Reliability and Security Laboratory where he work on design space exploration and virtual platforms. Before he worked at Prosilog SA and then at Texas Instruments. His research interests include design space exploration, hardware simulation, and dependability using virtual platforms. He earned a HW/SW Engineer degree and the Magister degree in Computer Engineering. Reda NOUACER is and has been involved in many interdisciplinary national, European (H2020) and internationalresearch projects as well as industrial research projects.



Prof Paolo Burgio

Embedded platforms for next-generation autonomous driving systems

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Abstract

The advent of commercial-of-the-shelf (COTS) heterogeneous many-core platforms is opening up a series of opportunities in the embedded computing market. Integrating multiple computing elements running at smaller frequencies allows obtaining impressive performance capabilities at a reduced power consumption. These platforms can be successfully adopted to build the next-generation of self-driving vehicles, where Advanced Driver Assistance Systems (ADAS) need to process unprecedently higher computing workloads at low power budgets. Unfortunately, the current methodologies for providing real-time guarantees are uneffective when applied to the complex architectures of modern many-cores. Having impressive average performances with no guaranteed bounds on the response times of the critical computing activities is of little if no use to these applications. Project HERCULES will provide the required technological infrastructure to obtain an order-of-magnitude improvement in the cost and power consumption of next generation automotive systems. This talk presents the integrated software framework of the project, which allows achieving predictable performance on top of cutting-edge heterogeneous COTS platforms. The proposed software stack will let both real-time and non real-time application coexist on next-generation, power-efficient embedded platform, with preserved timing guarantees.

Biography

Paolo Burgio got a M.S. degree in Computer Engineering from the University of Bologna in 2007, and a Ph.D in Electronics Engineering jointly between the University of Bologna and the University of Southern-Brittany, in 2013. His research topics are next-generation systems such as heterogeneous many-cores and GP-GPUs, from a software perspective: runtimes, compilers, programming models, and parallel software, but also architectural exploration and DSA.


Since 2014 he joined HiPeRT at Univ. of Modena to work on Real-Time systems, where he is currently performing research on predictable many-core architectures for next-generation real-time systems.
Paolo published several papers in top-level conferences and journals. He took part at the development of the VirtualSoC many-core simulator, and was involved in FP7 projects PREDATOR, Pro3D, vIrtical, and (currently) P-SOCRATES and H2020 top-ranked HERCULES.

 

 

 

 

 

 

 

 

 

 

 

Important Dates

- November 3, 2016

  Regular Paper Submission

- November
23, 2016
 Acceptance Notification

- December
4, 2016
  Final Submission and Registration


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December 18-20:
    IDT 2016